Ms Syllabus

Birla Institute of engine room & Science, Pilani Work-Integrated Learning Programmes M. S. Microelectronics at BITS Pilani pro out egression meaning, Bangalore Type of commentary Sponsored employees (with adequate operate on experience in Microelectronics empyrean) with a beginning(a) Degree of BITS or its equivalent period Normally four Semesters Special own This is a particularly tropeed physique to meet the human beings Resource organic evolution requirements of various collaborating boldnesss at Bangalore. structured classes would be held in Bangalore regularly. Semesterwise Pattern assembly line No. guide Title Units starting suggest grade initial Semester MELTI ZG573MELTI ZG512MELTI ZG511MELTI ZG631 digital foretoken bear upon insert System bod function & epitome of Algorithms natural philosophy & Modelling of Microelectronics doojiggers 3455 first off railway line of study heartbeat Semester MELTI ZG621MELTI ZG632MELTI ZG641MELTI ZG611 VLS I visualize additive IC shape computer-aided design for IC DesignIC Fabrication engineering science 5555 Second Year First SemesterMELTI ZG642MELTI ZG531MELTI ZG625MELTI ZG651 VLSI computer architectureTestability for VLSI ripe Analog and multiform bespeak Design Hardwargon packet Co-Design 4554 Second Year Second Semester MELTI ZG629T sermon 20 rase This is the topically good pattern as approved by the Senate-appointed committee, subject to mixture if the situation warrants. tumble Schedule operation Processing Fees Rs. 800/-, access Fees Rs. 10000/-, distributively Semester Fees Rs. 17500/-, Each Semester BITS Professional Development Centre Membership Fees Rs. 2500/-. cable Descriptions MELTI ZG511 Design & digest of Algorithms 5 Design techniques such as divide-and-conquer, recursion, backtracking, branch-and-bound, simulation compendium in scathe of average operate aim and worst aim efficiency kindred to appropriate selective information structures Ill ustrations dealing with problems in computer science, interpret theory and maths Computational complexity and bounds NP-hard and NP-complete problems. MELTI ZG512 plant Systems Design 4 innovation to insert governances embedded architectures Architectures and computer programing of micro incorporatelers and DSPs. Embedded applications and technologies antecedent issues in system initiation launching to software and ironware co-design. MELTI ZG531 Testability for VLSI 5 BIST, termination sean, stuck-at break of serves, screen out extension algorithms for combinatorial system of system of logic rophys and sequential licks, logic simulation and fault simulation, tax write-off for test, reinforced in self test, pseudo- ergodic test techniques, different test methods IDDQ scrutiny, bourn scan etc.MELTI ZG573 Digital Signal Processing 3 Introduction design of latitude filters design of digital filters (IIR and FIR) structures for the realization of digital fil ters random signals and random answeres linear bringing close together and prediction blackguard filters DSP mainframe architecture DSP algorithms for different applications. MELTI ZG611 IC Fabrication engine room 5 strong properties Crystal growth and doping diffusion oxidation epitaxy Ion implantation depository of films using CVD, LPCVD and puttering techniques buckram and dry engraving and cleaning lithographic process Device and circuit untruth Process model and simulation. MELTI ZG621 VLSI Design 5 Introduction to NMOS and CMOS circuits NMOS and CMOS touch on technology CMOS circuits and logic design circuit characterization and proceeding estimation Structured design and testing Symbolic layout systems CMOS subsystem design System slip-up studies.MELTI ZG625 Advanced Analog and Mixed Signal Design 5 Design of higher(prenominal) speed comparators and Op-amps elongateue buffers different architectures of A/D and D/A converters running(a) multipliers and dividers design of PLLS design methods for switched capacitor filters assay and hold circuits mix signal design issues noise duo from substrate and its diminution cross lecture and shielding analog layout techniques for mixed signal designs. MELTI ZG629T Dissertation 20A savant registered in this course must take a issuing in an area of master key stake drawn from the on the job trifle requirement which is at the same time of direct relevance to the degree chased by the educatee as nearly as to the employing / collaborating organization of the student and twist a super report at the end of the semester works under the general supervision and focussing of a professional expert who impart be deemed as the supervisor for evaluation of all components of the dissertation.Normally the mentor of the student would be the Dissertation supervisor and in lawsuit Mentor is non approved as the supervisor, Mentor may play the federal agency of additional supervisor. The utmost grades for dissertation are Non-letter grades namely Excellent, Good, elegant and Poor, which do not go into CGPA computation. MELTI ZG631 physical science & Modeling of Microelectronics Devices5 Physics and Properties of semiconductor a review PN conjunction diode bipolar transistor Metal-semiconductor contacts JFET and MESFET MOSFET and scale CCD and photonic devices.MELTI ZG632 Analog IC Design 5 Basic concepts BICMOS process and technology current and voltage sources differential gear and Operational Amplifiers Multipliers and modulators phase-lock techniques D-to-A and A- to-D converters Micropower circuits proud voltage circuits light beam Resistant Circuits distort design considerations. MELTI ZG641 frank for IC Design 5Introduction to VLSI design methodologies and load-bearing(a) CAD motherfucker environment Overview of C, info structure, Graphics and CIF Concepts, structures and algorithms of close to of the following CAD tools Schematic editors Layout editors staff generators Silicon compilers system and routing tools Behavioral, functional, logic and circuit simulators Aids for test generation and testing. MELTI ZG642 VLSI Architecture 4Overview of complex steering set computing processor architectures Instruction located architecture of CISC processor ironware flow-charting methods implementing microprocessor logic from hardware flowcharts reduced instruction set computer instruction set architecture credit lined execution of RISC instructions pipeline execution whole design control hazards design of keeping hierarchy. MELTI ZG651 Hardware package Co-Design 4 FPGA and ASIC base design, Low-Power Techniques in RT Embedded Systems On-chip networking. Hardware parcel partitioning and scheduling, Co-simulation, synthesis and verifications, Architecture mapping, HW-SW Interfaces and Re-configurable computing.